1. Field of the Invention
The invention relates to a semiconductor arrangement, in particular a power semiconductor arrangement.
2. Description of the Related Art
U.S. Pat. No. 6,624,216 discloses a known semiconductor arrangement. In the case of the known semiconductor arrangement, an underfill is formed between a top side of a semiconductor, the top side being provided with contacts, and an electrical connection device formed from a film assembly. The known underfill is formed from an epoxy resin. When the semiconductor used in the arrangement is a power semiconductor, relatively high temperatures occur during operation.
Known epoxy resins used for underfilling have to be stored frozen, usually at a temperature of about −40° C. In practice, the material can be thawed at most three times. Otherwise, the properties of the epoxy resin change, in particular its pot life, which is short under the best of circumstances. For processing purposes, disadvantageously it is firstly necessary to thaw the epoxy resin. That is time-consuming. A further disadvantage of the epoxy resins that have been used hitherto as underfill materials is that they only have a thermal stability in continuous operation of at most 170° C. In addition, the known material has a glass-forming temperature TG of less than 200° C. Above the glass-forming temperature TG, its coefficient of linear expansion (CTE) changes abruptly. That can lead to undesirable damage or faults during method steps downstream of the production of the underfill, for example during reflow soldering. Finally, the thermal conductivity of the known material is not particularly high, generally in the range of from about 0.25 to about 0.5 W/mK. Consequently, it is not suitable, or is suitable only to a limited extent, in methods for producing a power semiconductor arrangement that involve the release of a relatively large amount of heat during operation.